Memotext & word processing in general

[mrtinb]

Sorry I'm seeming pushy. I'm just throwing out ideas.

[Moggy]

No Martin this is how we learn things and at the moment I'm getting some EPROM dumps that do not make any sense, so in the morning I may just remove the EPROM and read its contents and see if it corresponds with what I'm getting when it is attached to the circuit board.

[mrtinb]

Removing ICs can be a tricky thing, for me at least. Needs the right tools.

[mrtinb]

No Martin this is how we learn things and at the moment I'm getting some EPROM dumps that do not make any sense, so in the morning I may just remove the EPROM and read its contents and see if it corresponds with what I'm getting when it is attached to the circuit board.

We don't even know if the large EPROM starts with the program at it's first address. Only the EPROM which overlaps address 0 will tell us where the software in the large EPROM start.

And since EPROM which overlaps address 0 will also overlap the low addresses for restarts, the 8 RST instructions can now have totally new functions.

[XavSnap]

[private message]

[Paul]

Can someone please show me a link where i can see photos of the internals of the Memeotext module ?
Both sides of the PCBs would be interresting to me.
Kind regards
Paul

[Moggy]

Can someone please show me a link where i can see photos of the internals of the Memeotext module ?
Both sides of the PCBs would be interresting to me.
Kind regards
Paul

I will take photos and post later today Paul.


EDIT.

A bit sooner than expected and although not perfect they should give you some ideas.

Also looking at the board I will take Martins advice and leave it alone and do an EPROM dump anyway and see if it makes sense to anyone also the EPROM is a 2716.

[Paul]

Thanks a lot Moggy!
What I haven't understood is the talk about two Eproms when looking at the pictures I see only one.
Of course one of the chips is a dreaded pal.
Kind regards Paul

[1024MAK]

IC1 PAL16L8-4CN Programmable Logic chip
IC2 74LS373 Octal transparent latch
IC3 6331-IN 32 x 8 bit (256 bit) PROM
IC4 2716 EPROM (2K bytes)
IC5 74LS02 Quad 2-input NOR gates

Looking at the board, I’m guessing that the 34 Way pin header is a parallel (Centronics like) port.
If so, IC2 is used to drive the printer port data lines.

IC1 is used for a lot of the address decoding.

IC3 and IC5 look to be heavily involved with the printer port, but it’s hard to get a clearer idea of what’s going on at the moment.

Moggy, where does the disable switch connect to?

Hang on! This is a MT07-02 Memotech Centronics Interface!

Mark

[Paul]

Very good Mark!
I was already wondering why it adds a parallel port while the instructions don't say so.
Also 2k seems to small reading what it's able to do, again from reading the manual.
I still hope Moggy can add the correct pictures