Sinclair ZX80 / ZX81 / Z88 Forums

While still waiting for a few bits to arrive so that I can start proper tinkering on my 3 attic ZX81s, I was idly wondering about 16K RAM packs.

Am I right in thinking :

ZX81 built in RAM is 1K of static RAM but 16K RAM pack is 16K of dynamic RAM and thus has some refresh circuitry and extra voltages created for the DRAM?

The internal 1K is disabled when a RAM pack is fitted, so the RAM pack is 16K, not 15K added to existing 1K?

If so, how is the internal 1K disabled when a RAM pack is fitted?

Just idle curiosity really. A bit of googling more or less answered some of this, but not the last question.

OK, just one more... I'm assuming most 3rd party RAM packs were more or less the same design, but were there any quirky outsiders? eg 16K SRAM?

Thanks

Ian

The internal RAM is disabled by shorting out of the RAM CS line to 5V which is on the edge connector. This does no harm to the ULA as there is a resistor.

sheddyian wrote: ↑Mon Dec 07, 2020 12:35 pm While still waiting for a few bits to arrive so that I can start proper tinkering on my 3 attic ZX81s, I was idly wondering about 16K RAM packs.

Am I right in thinking :

ZX81 built in RAM is 1K of static RAM but 16K RAM pack is 16K of dynamic RAM and thus has some refresh circuitry and extra voltages created for the DRAM?

The internal RAM is 1k bytes of SRAM (either one 1k x 8 bit SRAM chip, or two 1k x 4 bit chips) in a ZX81. In a TS1000 a 2k x 8 bit SRAM is fitted.

All the 1980s 16k byte RAM packs use eight 16k x 1 bit DRAM chips to give 16k bytes.
The early types include built in refresh circuitry, but the later types use the Z80 refresh cycles. This works despite the way that Sinclair used the Z80 refresh system for the screen display.

The type of DRAM chips used are 4116 or equivalent types which need +12V as the main supply, +5V for the interface section and a -5V bias supply. Various circuits/systems exist to generate these voltages.

sheddyian wrote: ↑Mon Dec 07, 2020 12:35 pmThe internal 1K is disabled when a RAM pack is fitted, so the RAM pack is 16K, not 15K added to existing 1K?

Yes.

sheddyian wrote: ↑Mon Dec 07, 2020 12:35 pmIf so, how is the internal 1K disabled when a RAM pack is fitted?

fordp2002 wrote: ↑Mon Dec 07, 2020 12:52 pm The internal RAM is disabled by shorting out of the RAM CS line to 0V which is on the edge connector. This does no harm to the ULA as there is a resistor.

Not quite. The /RAMCS signal goes low to enable the internal SRAM chip(s). But there is a resistor between the ULA (which does the address decoding) and the internal SRAM chip(s). The /RAMCS signal at the edge-connector is on the SRAM side of this resistor. So to disable the internal SRAM chip(s) you simply connect the /RAMCS signal at the edge-connector to +5V.

sheddyian wrote: ↑Mon Dec 07, 2020 12:35 pm OK, just one more... I'm assuming most 3rd party RAM packs were more or less the same design, but were there any quirky outsiders? eg 16K SRAM?

Unlikely, in the 1980s SRAM chips were significantly more expensive than DRAM chips for the same capacity. There were certainly 32k byte and 64k byte expansions (all using DRAM) and there were 2k / 3k / 4k byte expansions that would work with both the ZX80 and the ZX81 / TS1000. There may have also been some 6k byte or 8 k byte types.

Mark

1024MAK wrote: ↑Mon Dec 07, 2020 1:59 pm Not quite. The /RAMCS signal goes low to enable the internal SRAM chip(s). But there is a resistor between the ULA (which does the address decoding) and the internal SRAM chip(s). The /RAMCS signal at the edge-connector is on the SRAM side of this resistor. So to disable the internal SRAM chip(s) you simply connect the /RAMCS signal at the edge-connector to +5V.

Thanks, Mark of course 5V otherwise the RAM would be enabled all the time!

I have fixed my post.

1024MAK wrote: ↑Mon Dec 07, 2020 1:59 pm The internal RAM is 1k bytes of SRAM (either one 1k x 8 bit SRAM chip, or two 1k x 4 bit chips) in a ZX81. In a TS1000 a 2k x 8 bit SRAM is fitted.

All the 1980s 16k byte RAM packs use eight 16k x 1 bit DRAM chips to give 16k bytes.
The early types include built in refresh circuitry, but the later types use the Z80 refresh cycles. This works despite the way that Sinclair used the Z80 refresh system for the screen display.

The type of DRAM chips used are 4116 or equivalent types which need +12V as the main supply, +5V for the interface section and a -5V bias supply. Various circuits/systems exist to generate these voltages.

Thanks for your detailed reply, it's all very interesting, especially how a RAM pack disables the onboard RAM.

I note that I have both of the 1K RAM setups you describe - one of my 81's has the two smaller chips, the other two have one larger chip.

I wonder why Sinclair never made a 2K model for the UK? 1K is so tricky to do much with, increasing to 2K would have been a dramatic difference and it's easy to see why the Timex model had 2K as standard.

Ian

sheddyian wrote: ↑Wed Dec 09, 2020 11:13 am I wonder why Sinclair never made a 2K model for the UK? 1K is so tricky to do much with, increasing to 2K would have been a dramatic difference and it's easy to see why the Timex model had 2K as standard.

Probably because they expected virtually everyone to upgrade to 16K. You buy the 1K machine, it whets your appetite, then you realise you need more RAM to do proper programming, and you go back to WH Smith and feverishly hand over another £49.95. That's how it worked for me anyway. The 1K kept the base price of "a computer" cheaper than anything else on the market. Giving that base unit more capability would just discourage upgrades, if anything.