ZX81: From UDG DIY to CHR$128 DIY

Discussions about Sinclair ZX80 and ZX81 Hardware
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Mustermann
Posts: 43
Joined: Sun Dec 22, 2019 12:09 pm
Location: Augsburg, Germany

ZX81: From UDG DIY to CHR$128 DIY

Post by Mustermann »

There are a couple of ZX81 Hi-Res games existing that are using UDG with 128 user defined characters. This is also named CHR$128.
There is not that much information available about CHR$128.

One piece of information I found is Kelly Murtas post:
viewtopic.php?t=1495#p15616
This is referencing Wilf Rigters description how to build ZX97lite that can be found here:
http://www.user.dccnet.com/wrigter/inde ... 97lite.htm

Another source of information is the article of Kelly Murta how to implement CHR$128 within a TK85:
http://zx81.eu5.org/chr128.html
(in Portugese language)

Both of them are not working for a ZX81 as they need access to a signal (INVERT} that is hidden inside of the ULA.

The only solution for a ZX81 I founf is using ZXPAND(+) and UDG4ZXPAND boards.
These are rebuilding all of the signals needed outside of the ZX81 box.
Unfortunately both of them are usually out of stock.

So tried to find a solution that work with standard parts only.

Based on that post:
viewtopic.php?t=1514

I was able to implement an internal RAM in 8k-16k area that is connected to ROM address lines.
Thanks to nollkolltroll!
I soldered a 32k RAM on the back of the ROM and added 2 chips for address decoding.
So I was able to run UDG in 8k-16k area. Many UDG games work with that.

The articles of Wilf and Kelly told me that we need to know the status of the INVERT bit of each character. In case of CHR$128 this bit is used to steer A9 of the RAM in RFSH cycle.
The lowest bit of I register in the CPU may switch between UDG and CHR$128. This signal can be found on A8 of CPU in RFSH cycle.

Based on my experience with Minstrel 3 clone I propose these steps to get CHR$128 working in a ZX81 with standard components only:
- Build internal RAM expansion in 8k-16k area, connected to ROM address lines
- Latch the level of D7 (at RAM not CPU as this is pulled to 0 by ULA) at the end of M1 cycle
- In RFSH cycle keep A9 of the RAM unchanged if A8 at CPU = 0 and use the output of the latch as A9 of the RAM to select one of two character areas if A8 at CPU = 1.
- As I was not sure if D7 can be latched fast enough at the end of M1 cycle: Add some delay to D7

I used an 74HCT08 for delay, an 74HCT74 as latch and an 74HCT251 for the logic to build A9 to the RAM

CHR$128.jpg

And Tada!
My ZX81 is able to run CHR$128 programs that are using 8k-16k area for character sets.

I am able to tell in more detail if needed.

Max
ZX81 issue 1 near to original state
ZX81 issue 1 56k internal ram with battery backup, UDG, CHR$128 and WRX enabled
Minstrel 3 ZX81 clone 64k with battery backup, UDG, CHR$128 and WRX enabled
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mrtinb
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Joined: Fri Nov 06, 2015 5:44 pm
Location: Denmark
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Re: ZX81: From UDG DIY to CHR$128 DIY

Post by mrtinb »

Wow :) That's great work.

I have the UDG4ZXpand and enjoy it.

But it's great to see that UDG can be done without it.

Thanks for your post.
Martin
https://zx.rtin.be
ZX81, Lambda 8300, Commodore 64, Mac G4 Cube
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