Sinclair ZX80 / ZX81 / Z88 Forums

Back on topic. Would this schematic have cassette output?

The logic looks almost right. However, I think you may need the output from the other NOR gate (that forms the S-R flip-flop).

Are you intending to make this using standard logic chips (74xxzzz logic chips) or programmable logic?

Mark

That would be 7400-chips. It's a proof og concept to connect to other hardware. Let's see what time will bring.

its looking a bit overly complicated.... you can do it with 2 dip 14 74xx chips, a 7400 nand gates and a 7432 or gate. look at the vsync latch on the zx80 shematic ... dont forget you dont really need all the address decoding... not any address decoding at all on the io write detect

Regards Andy

mrtinb wrote: ↑Fri May 04, 2018 7:48 pm That would be 7400-chips. It's a proof og concept to connect to other hardware. Let's see what time will bring.

If you do intend to use 74 series logic, and want more than minimal address decoding, these chips are useful in reducing chip count:

• 74xx30 NAND Gate, 8 Input
• 74xx688 Digital Comparator

Mark

So... after these years... Did u get it working?

mrtinb wrote: ↑Fri May 04, 2018 7:48 pm That would be 7400-chips. It's a proof og concept to connect to other hardware. Let's see what time will bring.

Nope. Can't remember where I hit a wall.

Hi Martin,
I redraw your logic drawing with dedicated LS ships :

Yes, something's wrong for the latch disable on /RD…
May be you had to use the /IOrq*Address bus=0 to release it…


Kicad schem files:

I'm not going further with this. I have other projects.