ZX81+35 Clone

Discussions about Sinclair ZX80 and ZX81 Hardware
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PokeMon
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Re: ZX81 Clone

Post by PokeMon »

Mahjongg,
if you read carefully the description of Grant Searle you would understand that the sync impulse is done 16 clock cylces after the INT ACK or lets be more exactly 16 clock cycles after releasing IORQ from INT ACK.

http://searle.hostei.com/grant/zx80/zx80nmi.html

So 16 clock cycles after INT ACK the sync pulse starts for a duration of additional 16 clock cylces and the next period of 16 clock cylces the video output should be "quiet" (black) for further 16 clock cycles. In fact video output works with any other offset, too - but would move the visible picture or start of the first character on screen to left (negative offset) or right (positive offset).
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1024MAK
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Re: ZX81 Clone

Post by 1024MAK »

A small, but important point. The timing is not related to the colour encoding system, but to the TV standard used. PAL and NTSC are the colour encoding systems and can be used with 625 line, 15625Hz, 50 Hz systems or 525 line, 15734Hz, 60Hz systems. Remember, monochrome TV started long before colour. Colour is an add on :mrgreen:
combine Sync and Vsync using an XOR, instead of a simple OR
The method used for the period of time to encode the vertical sync signal with respect to the horizontal/ line sync signal changed. But I forget which way now. I think originally the OR method was used, but this caused problems with the horizontal oscillator in some TVs drifting (the sync signal resets the oscillator timing so that it "locks" to the transmitted signal). So the standard was changed and so the XOR method should be more acceptable to most TVs.

Certainly when creating a sync combiner circuit for another computer, I found using an XOR gate worked far better than an OR/NOR gate.

Composite video, IS complex because it is a series of layers that have been combined.
First, monochrome video mixed with two sync signals (so video, Hsync and Vsync). That's three signals combined to start with.
Then colour encoding (PAL, NTSC or SECAM), this is the three colour channels (red, green and blue) that are processed to produce an additional signal that is then modulated onto the existing monochrome composite signal. The whole lot is then frequency limited so it can be modulated for transmission. A lot of the reasons why things were done the way they were are tied up in the performance of the technology of the time (valves/tubes) and the power band/performance of the transmitter system.

The development of TV was very messy, as this discussion shows.
A summary of the common standards is here.

Even more technical details of the different standards are here.

Mark
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mahjongg
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Re: ZX81 Clone

Post by mahjongg »

I have started the necessary changes (in the schematics). The current logic for sync, and porch will be removed, and replaced by something completely different, i'm still deliberating exactly what, for the mean time I have made some changes, and replaced both EXOR's in the design with single gate versions, this has two advantages, first I can replace the sync combiner EXOR with an OR when the EXOR gives an unsatisfactory result, or to make the logic more compatible with an ULA, and the two EXOR's wired as inverters can be replaced with real inverters when I replace the 74HC86 with an 74HC04, leaving four inverters I can use, one of them will replace one NAND port used as inverter. This gives me some gates to work with, next I probably will add a dual 4-input AND or NOR, and see what I can do with that, three OR ports will also be removed, and can be used.

Next week I will continue with this puzzle, the goal is to have a circuit that creates a sync pulse during cycles 16 to 31 0b0001xxxx and a back porch in the cycles behind them, probably (to keep the logic simple) It will be 32 to 47 0b0010xxxx or, if I can manage 32 to 46, so not 16 but one less, that is 15 cycles. But looking at the timing diagrams of a PAL/NTSC diagram I doubt I will need it, in worst case I will get a black bar in front of the characters, if that happens I will need to re-think the back porch logic. So be it. With a PLC or FPGA you can add more logic easily, but with standard logic I must be much more prudent.
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mahjongg
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Re: ZX81 Clone

Post by mahjongg »

Great, I have a new schematic revision 2.2 of ZX81+35 ( 35 because it should be released in 2016, 35 years after 1981)
the new .PDF can be downloaded here: https://revspace.nl/File:ZX81%2B35_REV_2.2.pdf

I'm asking all interested parties to download it, and have a good look at it, and comment.
Note that the design uses the same amount of SOIC IC's, but has a few more SOT23-5 single gate logic IC's
I changed U8 from a 74HC32 into a 74HC4002 4-Input NOR, and changed U21 from a 74HC86 into a 74HC04.
two XOR gate's were changed into additional new 74HC1G86 single gate logic devices.
I have left over one HC04 inverter.

If I'm convinced this is all Okay, I will start the layout changes.
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PokeMon
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Re: ZX81 Clone

Post by PokeMon »

Your website certificate is invalid - so the file can't be downloaded as you use additionally "HTTP Strict Transport Security (HSTS)".
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mahjongg
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Re: ZX81 Clone

Post by mahjongg »

I know, its a problem that is being worked on, if you have a Google Chrome browser it will work though.
I used one to upload the file.
I'm working on converting the file to a picture for upload here, and on Revspace.

P.S. It also works with IE, (yuk).
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mahjongg
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Re: ZX81 Clone

Post by mahjongg »

Here is is as a .PNG picture, right click on it to open it in another windows for full size view

This is ZX81+35 Revision 2.2
[attachment=0]ZX81+35 rev 2.2 schematic.png[/attachment]
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ZX81+35 rev 2.2 schematic.png
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PokeMon
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Re: ZX81 Clone

Post by PokeMon »

Yes - with Chrome you can download it.
It took a closer look at the video control.
Following comments:

1. The combination of /CSYNC with XORing /HSYNC and /VSYNC is wrong. It should be simply ORed giving a /CSYNC with either /HSYNC or /VSYNC. If you do it with the XOR you will get small pulsed during the longer /VSYNC. There maybe problems with some TVs don't accept it as long as it is not really frame coded (ODD/EVEN frame). The simply old mono b/w signal would be just a long, uninterrupted vertical sync.

2. You should check your logic an a good TV for different delays of inverted or uninverted video pixels. There could be slightly visible pixel parts (needles) which are not seen under normal circumstances. A good test would be to print inverted chars, I would test a full screen with char $80 (black filled "space") and a screen with alternately $00 / $86 / $00 / $86 and so on. Maybe you don't see anything suspicious - if you see small line (parts) you could maybe delay the invert signal with your free HC04 inverter.

3. How do you control turbo mode exactly ? Couldn't find out at the first view.
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mahjongg
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Re: ZX81 Clone

Post by mahjongg »

Thanks for reviewing my schematic.
Yes, I have wondered which of XORing or just ORing HSYNC and VSYNC together would be better, that is why I used a single gate device for this function, so I can change it without affecting the layout. Theoretically XOR seems better at first hand, but it seems to lead to the top video jerking.
So I will take your advice, and I will change it to ORing. Thanks.

As for glitches, yes I'm aware they could be a problem, adding an extra delay could in some situations solve it, but I often would need a non inverting delay. In places where glitches could occur I plan to remove them with small RC circuits, but its hard to plan these ahead.
One place where they could occur is in the /PORCH signal, if the high nibble counter does not change its four outputs exactly synchronous then glitches in the /PORCH signals could occur which could lead to unwanted white stripes, same goes for the HSYNC signal. I'm not too worried though.

The turbo is controlled (ON/OFF) with the SWITCH signal, which comes from the switch in the lower right part of the schematic.
The switch there controls both the turbo control, and the 10% gain /WAIT circuit.
I "borrowed" the turbo circuit from parts of several similar circuits from the web.
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Andy Rea
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Re: ZX81 Clone

Post by Andy Rea »

Well here is my take on the Hsync / Vsync mixing dilema.

Firstly we should understand that at the final composite output the Vsync will mask any Hsync's, so during the entire duration of an active Vsync the output should remain low.

We should not try to mix an invert signal with a none ivert signal thus we are left with

(not Vsync) and (not Csync)

I.E either input low wi give a low output

or you can use

(Vsync nor Csync)

I.E Either input high gives a low output

Hope this helps
Regards Andy
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