RAM pack ULA schematic

[RetroTechie]

Hi all!

There's those 16K RAM packs we all love... ehm, loathe.

On the interwebs is easily found a schematic that involves discrete 74xx logic and 4116 RAM IC's. And photos of a RAM pack that consists of 2 circuit boards.

Funny thing is: I've got 2 of those RAM packs, and both of them have a single circuit board inside. Which includes a small ULA type IC. Just wondering if there's a schematic out there for this particular type of 16K RAM pack?

Disclaimer: this is NOT a call to break open your RAM pack and check! Just wondering if a schematic for this particular type RAM pack is out there. Comparing with the other type should make it straightforward to 'decipher' what that small ULA does, and schematic not needed that much. But hey, pinouts / schematics do tend to make the life of hardware enthousiasts easier...

[1024MAK]

No known full Sinclair schematic, but there is a pin-out plus a partial reverse engineered schematic (done by me) somewhere on this forum. I'm on a mobile at the moment, so searching is a pain. Search for repairs to Sinclair RAM pack or similar... If you don't find it, I will have a look later.

Update:
Link to information relating to which data bit is handled by which chip.
Partial schematic link

Mark

[1024MAK]

Oh, and the early Sinclair 16k RAM packs were more complex than they needed to be. There is no need to include refresh circuitry, as the Z80 CPU does the refresh anyway despite the way the ZX81 uses the CPU to produce the screen display.

I have investigated three other makes/designs of ZX81 16k RAM expansions and they don't have any refresh address generating circuitry, just address decoding, a -5V inverter, two address multiplexer chips and the DRAM chips themselves.

Mark

[RetroTechie]

Thanks for those links, Mark! Exactly the info I was 'fishing' for.

I did notice something unusual though:

DRAM control signals require some (short) delays, often something like /RAS low -> delay -> switch address multiplexers -> delay -> /CAS low. In practically every DRAM-based Z80 system I've seen so far, those delays are made in one of 2 ways:

• Using edges of the Z80 clock signal. Not present on any pin of this mini-ULA, not even via-via.
• Using some analog circuitry (simple RC-delays are common). Not seen hanging between pins of this mini-ULA either.

Which I think must mean that this mini-ULA includes some analog circuitry to create those delays. Which would be very unusual for an IC that basically replaces some digital logic. Then again, wouldn't be out of character for Sinclair to use something like that...
And perhaps technically better too, since IC-internal circuit behavior could be much tighter controlled than say, the # of nanoseconds delay a 74LSxx -> RC -> 74LSxx setup gives (as a function of component variations).

Oh, and the early Sinclair 16k RAM packs were more complex than they needed to be. There is no need to include refresh circuitry, as the Z80 CPU does the refresh anyway despite the way the ZX81 uses the CPU to produce the screen display.

Agreed! Checking that schematic suggests that 3 pcs. 74LSxx IC's might be removed without any downside. If it were verified that works, it could be a nice repair option (for folks still messing with RAM packs, that is ).

[Sam-Can]

This ULA is currently the bane of my existence. See: viewtopic.php?f=7&t=4266&p=43485#p43485

@RetroTechie: Did you get further with your analysis? I'm kinda wondering how to recreate one of these... shudder.

[1024MAK]

RetroTechie was last active on here in August 2019

Mark