Sinclair ZX80 / ZX81 / Z88 Forums

2016 / 6116 and 62256 SRAM pin-outs added to my earlier post.

Mark

Awesome job Mark thank you for adding those, I will now treat all address lines on pinouts as A'n' and not a specific number, its greatly helped my understanding.

Pin details on the CPU will always be correct.
With most systems, pin details on ROM chips will be correct.
The pin out for the ZX81 ULA is (I hope) correct.

It's just RAM chips on the Zeddy that you have to watch out for...

Mark

I know I am resurrecting a zombie here but this post is used frequently as reference.

As discussed earlier RAM implementation can use Address and Data lines in any order disregarding the original labeling.
I had a hard time testing an ISSUE 3 ZX81 (red) board from a TS1000 found in a CZ1000 (it has R30 cutted off) because I tried to check continuity using the original pinout as found in every datasheet and in this post.
So, This is how I finally found IC4 is connected in this particular board. (I don't know IF this is true for an ISSUE 1 board).
This is for the big IC 4 ram chip . In my case a 2Kb model.. I guess IC 4a/b have all lines scrambled also...

ZX81 ROM Socket pin out and 2764 EPROM pin out Note that in the above diagram, "ZX81 PCB" means the socket pin.
"Mask ROM" means an original 24 pin plastic Sinclair ROM chip (the type without a window on top).

If a 2764, 27C64, 27128 , 27C128, 27256 or 27C256 EPROM is being used, some wiring changes are needed.

Pins 1 through to 19 are okay as is.

EPROM chip pin 20 needs to be bent up so it does not enter the socket.
Use a thin insulated solid core wire to link EPROM chip pins 14 (GND) and 20.

Pins 21 and 22 are okay.

EPROM chip pin 23 needs to be bent up so it does not enter the socket.
Use a thin insulated solid core wire to link EPROM chip pin 23 (A11) to socket pin 20 (A11).

Pins 24 through to 28 are okay as is.

If a 27128 or 27C128 EPROM is being used, the ROM image (data) must be programmed to start at chip address 0x2000 (8192). In other words, it must be programmed in the upper half of the chip.

If a 27256 or 27C256 EPROM is being used, the ROM image (data) must be programmed to start at chip address 0x6000 (24576). In other words, it must be programmed in the top quarter of the chip.

Here's a photo showing the modification:


See this topic for the source of the photo.

Mark

Nice . Do you want to attach a copy of your Inboard 64K RAM Decoder diagram as a zip, so we can get a higher quality copy?

Mark

Sure,

http://zx81.ordi5.free.fr/brico/memoire/64K.gif

Have fun.

HI,
An EPROM 2716/32 programmer:
http://abandon.pcbs.free.fr/MicroSystem ... a_8255.png