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Re: ZX81 ULA-in-a-CPLD

Posted: Sat Nov 10, 2018 9:20 pm
by McKlaud
No /IORQ, no /NMI ...

Re: ZX81 ULA-in-a-CPLD

Posted: Sat Nov 10, 2018 9:23 pm
by Andy Rea
what i wanna know is what the heck is the ~IORQ line doing after the nmi stops... what in the world would cause so many io instructions ?

how many lines has your logic analyser got ? i'm thinking about probing the entire data bus and ~m1 in addition to the other lines then you can decode the exact instruction prior to a failure

Andy

Re: ZX81 ULA-in-a-CPLD

Posted: Sun Nov 11, 2018 12:44 am
by overCLK
Andy Rea wrote:
Sat Nov 10, 2018 9:23 pm
what i wanna know is what the heck is the ~IORQ line doing after the nmi stops... what in the world would cause so many io instructions ?

how many lines has your logic analyser got ? i'm thinking about probing the entire data bus and ~m1 in addition to the other lines then you can decode the exact instruction prior to a failure
Only eight. :-(

Re: ZX81 ULA-in-a-CPLD

Posted: Sun Nov 11, 2018 1:14 am
by 1024MAK
ZX81 ROM disassembly/ recreated source code available here ;)

Mark