AFAIK a ZX81 (and ZX80, too?) horizontal screen line is 207 clock cycles long, read: there is no count 207. Preload with value 206 instead.
If counting up, count is 0,1,...,205,206,0,1 etc, and hsync is active during counts 16-31 (tip: counts directly following that can be used as back porch signal!).
If counting down, count is 206,205,...,1,0,206,205 etc, and hsync should then be during counts (lemme think
) 190-175.
PokeMon wrote:The only different thing is, that my counter is stopped when NMI is disables and reset again when NMI is enabled.
That's definitely not correct! IIRC, Grant ran some tests which showed that this 207-cycle counter is reset by an interrupt acknowledge. But apart from that, a free-running counter that generates hsyncs at fixed intervals. All a programmer can do with the NMI enable/disable flipflop, is have those hsync's passed on to the Z80 as NMI's, or not.
Don't understand why you do it like this, the correct way to control this counter is simpler as well...
The counter 74HCT40103 does count backward, give one low pulse when counting to zero, which is stretched to 5 us (pulse is one clock cycle length only).
Just decode a range of counts: for example when counting up, counts 16-31 all have the same 4 upper bits. FWIW: a stable running counter & 207-cycle period is probably more important than this 16-cycle delay from INT-acknowledge (or exact hsync pulse width, for that matter).
If available, I recommend you use a synchronous reset (or preload) for the counter. Otherwise you can have this situation: reset condition occurs, some bits from the counter reset, decoding responds to changed counter value, and reset condition ends while some other counter bits are still
not reset (the counter is only 'half reset' so to speak). With a reset enable signal, and clock transition doing the actual (p)reset, you don't have that problem.
With same-speed logic this might not be an issue, but when using a 74HCT counter + output decoding with for example 74ACT, 74F or LVC logic, you might very well run into this problem.