Sinclair ZX80 / ZX81 / Z88 Forums

Recent discussions on this board regarding the ZX81 sync generation has re-awakened my interest to sort out a version of the NMI generator add-on to the ZX80 to use the "correct" method of re-synchronisation.

I did previously make a circuit to synchronise (counter reset) with the INTACK, then produce the correct 16 cycle width sync, 16 cycles after the INTACK (those who saw my version 2 of the NMI gen would have seen my scope pics where I checked the operation of the real ZX81).

This circuit originally used too many ICs, so I shelved it in preference for the simplified VSYNC version. I was setting goal of a maximum of 6, and the VSYNC re-synch version (version 3) actually used 5, and used a similar method as seen in other schematics.

Determined to reduce the chip count of the ZX81-correct version, I have now managed by fiddling with the circuit and a review of the logic gates to get it down to 6 "standard" 74LS series chips (with one spare gate) and a couple of discretes, including the circuit to perform the white level restoration.

To see this latest version, please see my web page at

http://searle.hostei.com/grant/zx80/zx80nmi.html
[Edit by Grant on 7th July 2012 - UPDATED URL !]


Make sure you "refresh" the browser page - the latest says "VERSION 4" near the top.
I have also re-introduced the scope picture, for info.

This version also works in the ZX80 mode (after turning off the NMI), maintaining correct synch, even with the "flicker free" games.

Bye for now.


Grant.
http://searle.hostei.com/grant/zx80/zx80.html
[Edit by Grant on 7th July 2012 - UPDATED URL !]

Nice! Thanks Grant!

Exccellent work, it's a really nice circuit and makes me wish i never dismantled the ZX80 i built a good few years ago using the diagrams and information from your very own pages, in fact it was doing just that, that got me back into all this '81 thing.... Oh hang on i should be shouting and balling damnations to you not praising you

Keep up the great work.

Andy

Thanks for your comments - they are much appreciated

Grant.

Thanks Grant for enhancing it again!
It just comes right with all these replicas built from your designs right now.
Mine works great and will shortly test your new circuit!

Keep on!!!

I have (finally!) soldered-it up, and mounted it on the right-hand side of the ZX80 replica board.

Pics have been added to the "construction" section of the web page.
http://searle.hostei.com/grant/zx80/zx80nmi.html
[Edit by Grant on 7th July 2012 - UPDATED URL !]

(refresh page if you can't see the pics, should show "Last update: 26th Septermber 2011" near the top of the page)

...I think that is finally "complete"
Regards.

Grant.

Cool Modification, nicely done on that thin strip, you wouldn;t know from a quick galnce that it's not supposed to be there. I quite like the idea of a 'dual' machine, i'm quite tempted to build another ZX80 now, kind of wishing i never dismantled the one i did make.

Andy

As I work on a another NMI generator with less components and some problems I have a question to the schematic from Grant.
http://searle.hostei.com/grant/zx80/zx80nmi.html

1. Has the HSync generator be running steady or would it be possible to switch it on and off every time NMI's are enabled by program ?

2. As it should run exactly 207 cycles every hsync pulse, why is it necessary to reset it every accepted INT/NMI (interrupt acknowledge cycle) ?
This can have any effect only when it comes earlier than 207 cycles. Why sould it come more early and why does this not disturb the hsync timing as there are one or more pulses in less than 207 cycles ?

3. The sync mixer, it is discussed only for vertical sync (vsync). But doesn't it generate the horizontal syncs as well ?
When I mix it, I think I have a mix of horizontal syncs from free running counter and from IC 11 ?

PokeMon wrote:As I work on a another NMI generator with less components and some problems I have a question to the schematic from Grant.
http://searle.hostei.com/grant/zx80/zx80nmi.html

1. Has the HSync generator be running steady or would it be possible to switch it on and off every time NMI's are enabled by program ?

pass, but in my ULA in ZX80 mode the hsync counter was still running, and reset by the intack. but it is impossible to generate nmi's

PokeMon wrote: 2. As it should run exactly 207 cycles every hsync pulse, why is it necessary to reset it every accepted INT/NMI (interrupt acknowledge cycle) ?
This can have any effect only when it comes earlier than 207 cycles. Why sould it come more early and why does this not disturb the hsync timing as there are one or more pulses in less than 207 cycles ?

there is a 16 cycle gap so it's possible to manipulate when the hsync shoudl occur, AZMIC has a 208 cycle per scanline video routine.

PokeMon wrote: 3. The sync mixer, it is discussed only for vertical sync (vsync). But doesn't it generate the horizontal syncs as well ?
When I mix it, I think I have a mix of horizontal syncs from free running counter and from IC 11 ?

since as both sync are low... a hsync can be masked by the much longer Vsync's so in other words if either Vsync or Hsync is low then compositie sync should also be low.

Andy Rea wrote:
there is a 16 cycle gap so it's possible to manipulate when the hsync shoudl occur, AZMIC has a 208 cycle per scanline video routine.

I don't understand what you mean. Hsync should occur every 64us (=207 clock cycles). Where is room for an extra gap ?