Oh no! Not another ULA.

Andy Rea · Post by **Andy Rea** » Mon Sep 04, 2023 1:49 pm

1024MAK wrote: ↑Mon Sep 04, 2023 1:46 pm If we don’t find any better uses for spare bits, if there are spare output pins, maybe use for Blinkenlights

This would normally be under software control, hence the Zeddy could gain a very simple output. If you don’t want a Blinkenlight, it could drive something else via suitable circuitry (transistor) such as a relay.

Mark

That is an awesome idea..

Post by **Paul** » Mon Sep 04, 2023 1:50 pm

Well, then activate ROMCS when write is high or Refresh is low according to A14 of course.
The other free bit could determin wether RAMCS should be normal or for 56K. ROMCS as well of course.

Moggy · Post by **Moggy** » Mon Sep 04, 2023 1:52 pm

Andy Rea wrote: ↑Mon Sep 04, 2023 12:49 pm
Paul wrote: ↑Mon Sep 04, 2023 7:52 am With those free bits, could you offer faster turbo modes?
This way we could try out up to which speed our Zeddy still works
You Want Quad speed ? in theory should work.. BUT you WILL need a faster CPU and The MOTOROLA type rom (or your own fast replacement) the NEC roms dont even work at double speed !

Bngger!!! the motorola rom is too slow also.

What about those of us using the big bang EPROM? Will that cope?

EPROM type 2764

Andy Rea · Post by **Andy Rea** » Mon Sep 04, 2023 1:53 pm

what about just not allowing ROMCS to go low if ~WR is low ? would that work ? or would it need some address qualifier also like address <= $1FFF

Andy Rea · Post by **Andy Rea** » Mon Sep 04, 2023 1:53 pm

Moggy wrote: ↑Mon Sep 04, 2023 1:52 pm
Andy Rea wrote: ↑Mon Sep 04, 2023 12:49 pm
Paul wrote: ↑Mon Sep 04, 2023 7:52 am With those free bits, could you offer faster turbo modes?
This way we could try out up to which speed our Zeddy still works
You Want Quad speed ? in theory should work.. BUT you WILL need a faster CPU and The MOTOROLA type rom (or your own fast replacement) the NEC roms dont even work at double speed !

Bngger!!! the motorola rom is too slow also.
What about those of us using the big bang EPROM? Will that cope?

what type of rom chip is it ? if its 250ns or less then i think it will be ffine.

Moggy · Post by **Moggy** » Mon Sep 04, 2023 1:54 pm

2764 old 21 volt type.

Post by **Paul** » Mon Sep 04, 2023 1:56 pm

About blinkenlight pins: I guess both oscillator pins are unused

About BigBang: which content is at address 1001?
255?

Post by **Paul** » Mon Sep 04, 2023 1:58 pm

Andy Rea wrote: ↑Mon Sep 04, 2023 1:53 pm what about just not allowing ROMCS to go low if ~WR is low ? would that work ? or would it need some address qualifier also like address <= $1FFF

I guess RAMCS should be high when ROMCS is activated. (See 56k Vs 16k comment)

Moggy · Post by **Moggy** » Mon Sep 04, 2023 2:01 pm

Paul wrote: ↑Mon Sep 04, 2023 1:56 pm About blinkenlight pins: I guess both oscillator pins are unused

About BigBang: which content is at address 1001?
255?

No idea I only use it, but do not know how it works.

Post by **Paul** » Mon Sep 04, 2023 2:04 pm

Moggy wrote: ↑Mon Sep 04, 2023 2:01 pm
Paul wrote: ↑Mon Sep 04, 2023 1:56 pm About blinkenlight pins: I guess both oscillator pins are unused

About BigBang: which content is at address 1001?
255?
No idea I only use it, but do not know how it works.

Just try PRINT PEEK 1001

I tried in eightyone, it gave 54, but I'm not shure I have the actual ROM. Mine could be older...

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