ULA revistited.

Any discussions related to the creation of new hardware or software for the ZX80 or ZX81
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Andy Rea
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Re: ULA revistited.

Post by Andy Rea »

@supaflo, Thats a cool little chip :D i did wonder what those pads were for, bit expensive (£2.50 here from farnell) compared to < £0.50 for the descretes to build the transistor circuit, but it does simplify and reduce required board space, i guess it's all about compromise.

@Phill, good idea on building a separate doubler, i was thinking it might be possible to build using a single Gal chip that would require only connections to the main board as a stand alone add-on, for people that have a good ULA but still want clock doubling. And yeah until i get my ULA replacement working then i'll work on the bells and whistles

Andy
what's that Smell.... smells like fresh flux and solder fumes...
Moggy
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Re: ULA revistited.

Post by Moggy »

Andy, Prime, superfo
I have NOOOOOOOO idea what language is being spoken here :oops:
but I have to say this thread is a cracking read and the end product -if Andy's smart green boards are anything to go by- looks like it's a winner.
Nice one Guys :D

Regards Moggy
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Andy Rea
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Re: ULA revistited.

Post by Andy Rea »

Ah ah, my fellow Zeddy fans. I have not been wasting my time, today i have inhaled plenty of solder fumes :shock: and built this...
Image
i#m sure Prime, superflo, Sirmorris and a few other will recognise what it is but for the benefit of those that don't it is a parralell JTAG programming lead (5V) and is going to be used for this...
Image

hiding under that breakout board is a 40 pin dip socket with wires soldered to the breakout board, i need to add an oscillator or build yet another transistor circuit, i'm getting quite good at building those now :D and play with pin assignments and add a few more lines of code for the address lines and memory decoding that my altera design does using a gal instead, but is a 3.3v device and i'm still waiting for the programmer to turn up from china been 2 weeks now... anyway this is lattice device 5V plenty of io's and should just about fit on a board small enough to take up no more space than the original ULA...

Anybody wanna voluteer for soldering the cpld to the boards... my 41 year old eyesight is not what it used to be and i had a bit of a nightmare with it... but so far so good, the software can read, erase and program it, so at least something is right :D

Regards Andy
what's that Smell.... smells like fresh flux and solder fumes...
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iturbez
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Re: ULA revistited.

Post by iturbez »

:shock: :shock: :shock: :shock: :shock: :shock: :shock: :shock: :shock: :shock:
Moggy
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Re: ULA revistited.

Post by Moggy »

Andy You are one crazy guy :lol:
For one minute I thought that square green board was an Athlon xp 3200!!!! :o :o
More of the same please :D

Regards Moggy
sirmorris
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Re: ULA revistited.

Post by sirmorris »

SU EFFING PERB
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Andy Rea
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Re: ULA revistited.

Post by Andy Rea »

I hate to admit it, mostly because i have hardly ever written code in such an organise way, but there really is something good about writting modular code, with each module carring out a simple task that can simply be simulated without getting lost in an overwhelming amount of information.

And so after a little battle with a few short circuits and double checking pin assiments i give you...

Lattice zx81.

Image

Pictures of my tv never come out very good, but i assure you it's a good stable clear picture :D

Apart from adding a few more lines of code to handle the memory decoding and the upper 6 address lines, i have not had to edit the code from that i intend to use on the Altera design (if my programmer ever turns up... :evil: )

This is just a plain vanilla implementation at the moment, now i start working on the bells and whistles code :lol:

First thing clock doubling. @Prime... Did you ever get your clock doubling working ?

oh and i need to tweak the Tape-in resistor network.

Regards Andy
what's that Smell.... smells like fresh flux and solder fumes...
Prime
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Re: ULA revistited.

Post by Prime »

Andy Rea wrote:I hate to admit it, mostly because i have hardly ever written code in such an organise way, but there really is something good about writting modular code, with each module carring out a simple task that can simply be simulated without getting lost in an overwhelming amount of information.

And so after a little battle with a few short circuits and double checking pin assiments i give you...

Lattice zx81.
Excellent well done.
Pictures of my tv never come out very good, but i assure you it's a good stable clear picture :D
I can believe it, my design with the Xilinx chip actually produces a much crisper picture, well using the transistor & 2 risistors composite mod anyways.
This is just a plain vanilla implementation at the moment, now i start working on the bells and whistles code :lol:

First thing clock doubling. @Prime... Did you ever get your clock doubling working ?
Nope scoping the outputs (with my logic probe) I couldn't see why it wouldn't work, clock outputs all looked good, switchovers from one clock to another where glitch free, it just didn't work :( As I had been getting nowhere for a week, I decided to work on something else for a few days, and come back to it later so that I came back fresh.

I did get the screen inversion and key-reading going, and see no reason why the m1-not mod would not work.
oh and i need to tweak the Tape-in resistor network.
Yes, I came to the conclusion that I might need a small transistor amp, I found that some tapes loaded fine but that others didn't provide enough signal even with the volume on my tape deck turned all the way up :( same tapes loaded absolutely ok on the same machine with the original ULA. Using Charlie's ZXpand I don't have this problem tho......

Out of interest how many macrocells does your chip have and how many is your design currently using, obviously I realise that this may not be directly comarible to the Xilinx chip, but I would imagine would be in the same ballpark.

For reffreence I'm currently using an XC95108 (108 macrocells), and the design is using about 75 of those cells.

Cheers.

Phill.
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Andy Rea
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Re: ULA revistited.

Post by Andy Rea »

Thanks Phill,

Yeah it might be a good idea to ad a small pre-amp to the Tape-input, it should help 'square off' the tape signal a bit before getting to the cpld too.

Hmm macro-cells thats a good one... the device is an old lattice ispLSI1032, which means it has 32 logic block, each logic block has 18 inputs and 4 outputs, giving 128, but it also has output/input registers making a total ogf 196 registers.. i'm not really sure how to compare them directly, maybe you could look at the datasheet. http://www.latticesemi.com/lit/docs/dat ... d/1032.pdf

oh hang on i just found this in the fitter report :lol:
Post-Route Design Implementation
--------------------------------

Number of Macrocells: 55
Number of GLBs: 31
Number of IOCs: 40
Number of DIs: c0
Number of GLB Levels: 2


GLB Utilization (Out of 32): 62%
I/O Utilization (Out of 68): 58%
Net Utilization (Out of 196): 40%
so um... about half i reckon, room for more in there yet :D

Regards Andy

EDIT... i get it now LOL, it's like 32 block of 18v4's
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sirmorris
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Re: ULA revistited.

Post by sirmorris »

I wanna play!

Maybe not with the ULA board but certainly with some kind of dev kit.

Any recommendations?
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