Introducing myself (RetroTechie)
Posted: Tue Nov 01, 2011 2:27 am
Hello all,
Registered today @ this forum since I've been following posts here for a little while, and thought it was time to change from passive to active participation...
My general background is best described in this post on MSX.org forum: http://www.msx.org/forumtopic9106.html
And for some time maintaining my own hobby site: Bitcycle.org - very infrequent updated, but by no means dead!
Some of you may know me from MSX.org or World of Spectrum forums, and I'm frequent visitor (mostly passive reader, occasional posting) on various electronics-related forums and news sites, especially the kind where 'nerds' can be found
like Slashdot, OSNews, Tweakers etc. Oh and longtime Free/Open Source user - running Linux exclusively, even for occasional 3D gaming and hardware development tasks (and have edited shell scripts, compiled programs from source & things like that).
Recently decided to devote some time to ZX81 hw development. It's been a longtime wish for me to build my own ZX81 clone, more specifically: use modern programmable logic (CPLD and/or FPGA) to replace the 'antique' ULA. Considered this a big job time-wise, but some recent research / info posted by several people (thx Grant Searle, Andy Rea, Wilf Rigter, Bodo Wenzel & others!), have increased my understanding of the ZX81's workings to the point where I think I'm up to the job.
Have devoted one of my (5) ZX81's as 'development board', hooked up a Xilinx XC9572 in 84-pin PLCC package to it (with ULA temporarily moved to underside (!) of the board), and making slow but steady progress on implementing logic in that CPLD to replace ULA functions. Currently done: clock generation (unfortunately I didn't manage to single-step the ULA's clock, but main clock is derived from a 13 MHz Xtal on the CPLD now), RAM/ROM chip selects, hsync generation, and this evening managed to replace ULA's /NMI pin with signal produced by the Xilinx part.
Of course the whole setup looks like crap, but still I prefer a big CPLD over an add-on board with lots of discrete logic IC's (or even build ZX80/ZX81 clone from scratch). I do plan to make it smaller (and perhaps have a custom PCB produced some time). But for me, first order of business is to get rid of the original ULA, and determine the exact logic required for a CPLD to take the ULA's place. Still considering to remove the ULA completely, especially since it would make it easy to single-step the CPU's clock & check what's happening on data/address/control bus between individual clock transitions. But OTOH there's something to be said for keeping the ULA around as long as possible until you have a replacement that works... changing a working system makes sure that individual steps are known working (and @ full speed), before making the next step. In the style of: "solve the small problems first, and when you have, then the bigger problems will turn out to be not so big anymore".
So ehm... 'watch this space!'
Registered today @ this forum since I've been following posts here for a little while, and thought it was time to change from passive to active participation...

My general background is best described in this post on MSX.org forum: http://www.msx.org/forumtopic9106.html
And for some time maintaining my own hobby site: Bitcycle.org - very infrequent updated, but by no means dead!
Some of you may know me from MSX.org or World of Spectrum forums, and I'm frequent visitor (mostly passive reader, occasional posting) on various electronics-related forums and news sites, especially the kind where 'nerds' can be found

Recently decided to devote some time to ZX81 hw development. It's been a longtime wish for me to build my own ZX81 clone, more specifically: use modern programmable logic (CPLD and/or FPGA) to replace the 'antique' ULA. Considered this a big job time-wise, but some recent research / info posted by several people (thx Grant Searle, Andy Rea, Wilf Rigter, Bodo Wenzel & others!), have increased my understanding of the ZX81's workings to the point where I think I'm up to the job.
Have devoted one of my (5) ZX81's as 'development board', hooked up a Xilinx XC9572 in 84-pin PLCC package to it (with ULA temporarily moved to underside (!) of the board), and making slow but steady progress on implementing logic in that CPLD to replace ULA functions. Currently done: clock generation (unfortunately I didn't manage to single-step the ULA's clock, but main clock is derived from a 13 MHz Xtal on the CPLD now), RAM/ROM chip selects, hsync generation, and this evening managed to replace ULA's /NMI pin with signal produced by the Xilinx part.

Of course the whole setup looks like crap, but still I prefer a big CPLD over an add-on board with lots of discrete logic IC's (or even build ZX80/ZX81 clone from scratch). I do plan to make it smaller (and perhaps have a custom PCB produced some time). But for me, first order of business is to get rid of the original ULA, and determine the exact logic required for a CPLD to take the ULA's place. Still considering to remove the ULA completely, especially since it would make it easy to single-step the CPU's clock & check what's happening on data/address/control bus between individual clock transitions. But OTOH there's something to be said for keeping the ULA around as long as possible until you have a replacement that works... changing a working system makes sure that individual steps are known working (and @ full speed), before making the next step. In the style of: "solve the small problems first, and when you have, then the bigger problems will turn out to be not so big anymore".
So ehm... 'watch this space!'
