Composite mod voltages

[PokeMon]

OUTPUT OF THE WHOLE BOARD
(note, this is 200mV/div, not 1V/div as in other pictures)

So, white is about 800mV. I could not catch pixels from "INPUT III" line here to see the black level. Sorry.


All measurements are done while Zx81 is connected to a TV (composite in).

Here is how it looks like on TV:


Now, as you see the background is pretty bright, but the letters are pale. This is a new problem.
Also, you see vertical lines on the background. Some kind of noise. I was writing about this problem before.

................

I am not sure how you measured these points.
Do you have a load (75 Ohm) at output or is it open ?

In the previous post It was measured open (no TV connected).


So current problems:

1) Pale black
2) Background vertical lines noise

So now is more clear to me.
In fact the circuit is working - so perfect so far, even if the picture is not perfect by now.

First to your picture above:
So the conditions of the composite video signal is measured from peak to peak without DC level.
So minimum voltage you have is 475mV and the maximum is 831mv - so the signal peak-peak (AC level) is about 350mV.
Very poor. And sync level is about 100mV.
In theory it should be 300mV sync part and 700mV video part (distance between low and high) .

If you gain this signal with factor 3 it could be perfect.
This is the reason for the pale black (I think you put brightness to maximum) and the reason for the vertical lines you see. This will go better when increasing signal voltage level - maybe you not see them with your eyes when voltage is about 1V peak-peak (AC).

Se lets have a view about your circuit / resistors.
By the way, you could measure without TV while connecting a 75R resistor to your output.
I have a chinch cable with just a 75R resistor at the end for measuring purposes, because my big 42 inch TV is not in the near of my developing room.

[PokeMon]

If you look at the output you will see this:

Maybe, just maybe, this overshoot (in red circle) is considered by TV a black level or adds a lot to a black level and that's why
black pixels are so pale.

I don't think that this is the problem. It is caused because sync signal generated from ZX81 is a bit shorter than in standard defined (4.7 us) and the back porch is added a bit later, not immediately at the end of the sync signal. That doesn't happen with the manual R/C triggering circuit with my inverters.

[PokeMon]

If you ever wondered here is my board layput:

It is for diode version, so i fixed it on the board itself (removed diode and added some vias for connecting to LS07).

And here a link to an actually board photo:
http://www.artem.ru/zx81/scope/2/board.jpg
It has some whire jumpers because i had to reconfigure it from DIODE version to a 3 buffer version.

So current problems:

1) Pale black
2) Background vertical lines noise

Well, looks funny the combination of sparing space with smd components and using resistor combinations in serial / parallel combination and some big capacitors.
But up to you.
In my following developments I used a R6/R7 combination of 120/120 or 100/100 while leaving other resistor values.
So my proposal is to shorten one of the two 75R resistors you have connected in series to build a 150R resistor.
And after check your picture again.
This will give not more than 40mA for the drivers and they will surely survive. Maybe later you can use 100/100 or 120/120.
But think you can also use 75/75 which will cause a bit more current consumption.
Up to the temperature of your voltage regulator.

[PokeMon]

[*]Why 2 or 3 resistors in series/parallel when 1 does the job? (R3, R5, R7) They don't burn much power, can get rid of the heat easily, and it's all standard values.[/list]

Well I think because he want to reduce different resistor values used for that board or these resistors are available by his "development parts box".

[PokeMon]

Ceramic cap parallel with the 10 uF electrolytic probably doesn't do much so could be removed.

Disagree slightly. The ceramic capacitor provides high frequency decoupling as the electrolytic capacitor is not very good at high frequencies.

Well we had this dicussion at another point and in fact it is not that difference when looking at electrolytic capacitors datasheet.
I guess you could spare the parallel ceramic condensators without big difference in the picture but anyway I wouldn't do that.
It's a kind of concept or philosophy or whatever.

But the decoupling capacitor of at video input / ULA output could be used smaller, 10uF or 4.7 uF would be okay I think.
As the sync part don't count for the pixel driver, the 100nF capacitor could be enough as well but did not test it out on my own because I developed a better circuit or schematic later without coupling capacitors in ULA connection and use a trimmer 10k for optimal sample voltage point.

The reason for that is, that the capacitors will move the signal feeded into the driver because they try to balance the video signal out depending on the white/black part signal. This could be visible when you enter more characters on screen or even make a complete black screen whil printing lines with black symbols on screen. So the size/quality of the characters in a mixed style could differ regarding what is displayed on screen. I found that out in my later tests.

[ArtemKuchin]

I really don't know what to say about my resistor/capacitor network. I measured it maybe 20 times now between all possible points and everything seems to be correct.

I am still puzzled by how LS07 behaves. It is a buffer, right? So, it when it receives a signal on pin 1 it should output the same signal on pin 2 just buffered.


But i see something strange. Let me repeat myself.


PIN 1 INPUT (SIGNAL FROM ULA):


and now PIN2 which is supposed to be the same as PIN1


From what i see it is a wonder that i see anything at all when pixel driver signal is so much attenuated.
Do you have an idea what happens here? I have one. Let me share it: The R between PIN2 and GND is actually R3+R6 which is 108 Ohm.
So, at max signal of 5V PIN2 is loaded with 5/108=46 mA! Ooops, over current on the pin! Could it be the problem? If so, then the voltage divider's
Rs must be twice as large for normal operation. Now consider what happens to the other pins: PIN4 output - R to GND is 15+75 = 90! Even more current.
PIN6 to GND - 108 Ohm again. Total momentary current can be as high as 0.15A + IC needs! That can affect signal badly, i think.
Do you agree with me? Maybe i should try something like around 600 / 300 Ohm divider?
I have reread the datasheet for LS07 and from it it looks like that 40mA is TOTAL current, not PER PIN. So, the thing is very very very far overcurrented, if
i may say so.


BTW: the brightness of tv is not set to max, it is my normal everyday brightness, maybe 40% only.

And for the SMD: i use SMD not because i try to save space but because
1) SMD ICs are a lot cheaper than DIP
2) I HATE drilling!

[PokeMon]

I really don't know what to say about my resistor/capacitor network. I measured it maybe 20 times now between all possible points and everything seems to be correct.

I am still puzzled by how LS07 behaves. It is a buffer, right? So, it when it receives a signal on pin 1 it should output the same signal on pin 2 just buffered.

But i see something strange. Let me repeat myself.

Well it is a driver but an OPEN COLLECTOR (!)
Here is the schematic:

If you do not connect a resistor (network) from output to supply voltage you can not see anything.

[ArtemKuchin]

Sorry for my feeble electronics skills. I forgot again that it is an Open Collector. Argh..

Anyway. that changes the number a bit (current flows from +5 to the pin).

PIN 2: R7+R3 = 183, I= 27mA
PIN 4: 15 + 150 Ohm, I = 30mA
PIn 6: again 28mA
Total: 0.84mA - max current at pins.
Too much again.
I know, that's it is unrealistic estimation, because most of the time the inputs are HIGH, so the transistor is closed. However, if we consider what happens with output on pin 2 (very low constantly) then the overall current will be close to the limit all the time i think.

Anyway, do you have any idea why PIN2 output is so attenuated?
Since it is an open collector and the input is most of the time is HIGH then the transistor on pin 2 must be closed most of the time and voltage is pulled up to the divider value which is approx around 3V, if i am not mistaken. Why the heck it is so LOW then all the time?

[PokeMon]

I have reread the datasheet for LS07 and from it it looks like that 40mA is TOTAL current, not PER PIN. So, the thing is very very very far overcurrented, if
i may say so.

Well you are wrong in that point.
You can verify here:
http://pdf1.alldatasheet.com/datasheet- ... /LS07.html

The "recommended operating conditions" specify just to use a maximum 0f 40mA. This is per gate and meant as a steady current. Even there is no "fuse" so if you use a bit higher current this will affect lifetime of the chip but not that significantly. For example 41 mA will not kill the gate, even 45mA will not be dramatic. And this is meant per gate. If you ever inform yourself about failure rates and lifetime of integrated circuit you will wonder how much they can take. it is "normal" to run CPU's (Intels iCore for example) with temperatures above 70 or 90 degrees. So don't worry about it.

Anyway, you have parallel to your 33R resistor a 75R resistor and the circuit will have a rest voltage of about 200 or 300mV (will not 100% switch to GND with full current). So let's say you have 2/3 of current in the 33R resistor and 1/3 in the 75R resistor. So if you calculate a current of 60mA this will reduce a voltage drop down to 0.5 V at the resistor divider. Or if you calculate with 40mA overall this will give a breakdown to 2.0V. This is difficult to calculate but you can be sure the voltage will break down enought to have not more than 1.5 V when driver is going down, which will give something of 35mA, more or less.
Or in other words: If you have a signal which has a voltage level peak peak of not more than 1V the corresponding current thorugh 33R resistor is about 21mA (0.7V video part and 0.3V sync part).

You can use two 100R resistors if you are afraid of damaging something but this will not happen. It is more easy for you just to shortcut one resistor of the two 75R resistors just to see what happens on screen. This doesn't have to be forever, just for a test, not more.

But up to you.

[ArtemKuchin]

Okay i will of course do the shortcut and check what i see when i get home tonight and have some time.
But can you comment on buffer pin 2 video signal attenuation issue i described ? You kind of ignoring it.
Or you want to see the test first?

As for the how much current a chip can withstand some time ago i did a test with atmega 8. I setup all pins as output HIGH and shorted them to ground.
It was HOT as hell, the total measured current was about 2A BUT it worked, and worked, and worked for 15 minutes at least. Then i had to do other things,
so i stopped. I used this chip for many things later and it is still alive.

But i checked
http://pdf1.alldatasheet.com/datasheet- ... /LS07.html
and i don't see "per gate" anywhere. The table specifies overall values for the chip. Vcc for example, of ICCL which is 45mA.
Maybe i just can't read datasheets. But when i've read a datasheet for atmega it was clearly stated, that the recommended is 20mA per pin and 60mA total (compare that to 2A i fed it
Anyway, i take you word for 40-100 mA should be be a problem.