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I've got a silly question. All buffered lines have pull-ups. Do you want to keep them HIGH when they are nor used? In my understanding they should be LOW if they are not used/active.MarkI wrote:There’s no need to have pull-up resistors on the buffered address lines, as the 74xx244 buffers will always be driving the buffered address lines.
I presume that there is no intention to disconnect the Z80 from the busses via /BUSREQ.
There is one thing that is missing, and it’s rather important if you are going to allow the Z80 to read data from devices (memory or IO) from the external bus. There needs to be some circuitry to prevent the 74xx245 bidirectional buffer from driving the data bus on the Jupiter Ace board side when the Z80 is accessing any of it’s on board memory or built-in IO ports. Otherwise the on-board memory/IO chip will compete with the 74xx245 and cause a bus clash
If you have room/space, it may be worthwhile buffering the following control lines: /WR, /RD, /MREQ, /IOREQ as its always good to have nice clean control signals with reasonably fast edges.
Thanks Mark, I have done some partial updates and re-attached the file to my original post.1024MAK wrote: ↑Tue Sep 29, 2020 1:22 pm For the data bus, the normal practice is to pull it up to VCC rather than leave it floating (which will be case should the Z80 try to read any unimplemented memory or IO address).
As I wrote on StarDot...MarkI wrote:There’s no need to have pull-up resistors on the buffered address lines, as the 74xx244 buffers will always be driving the buffered address lines.
I presume that there is no intention to disconnect the Z80 from the busses via /BUSREQ.
There is one thing that is missing, and it’s rather important if you are going to allow the Z80 to read data from devices (memory or IO) from the external bus. There needs to be some circuitry to prevent the 74xx245 bidirectional buffer from driving the data bus on the Jupiter Ace board side when the Z80 is accessing any of it’s on board memory or built-in IO ports. Otherwise the on-board memory/IO chip will compete with the 74xx245 and cause a bus clash
If you have room/space, it may be worthwhile buffering the following control lines: /WR, /RD, /MREQ, /IOREQ as its always good to have nice clean control signals with reasonably fast edges.
